High-Resolution Wideband Vector-Sum Digital Phase Shifter With On-Chip Phase Linearity Enhancement Technology

In this paper, a wideband vector-sum phase shifter with linearity enhancement technology is proposed to minimize error. The digital synthesizes the output phases by modulating and summing four quadrature signals. A common-source stage transformer-based matching network quadrature-all-pass filter (QAF) are utilized for signals generation within wideband. Besides, decrease influence of parasitics on amplitude error, resistor-based compensation employed in QAF implementation. Then, obtain 360° range high resolution shifts, modulated Gilbert-type variable gain amplifiers (VGAs) digital-controlled current-digital analog converters (current-DACs). To further an on-chip loop utilized. drain voltages current-DACs detected compared presupposed reference generated loop. results fed back control achieve enhancement. verify mentioned mechanism, 7-bit operating at 22-44 GHz implemented fabricated 28-nm CMOS technology. Based technology, exhibits RMS error 0.36-0.59 dB 0.92° -1.02° without off-chip pre-distortion (DPD) total DC power consumption including loops 35 mW under 0.9V supply voltage.